Technical Staff Engineer - Digital Design

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The Mixed Signal Development Group is responsible for delivering analog, digital and mixed-signal IP to divisions within Microchip. We work with leading edge CMOS processes to produce mixed-signal integrated circuits for wireline applications. From DDR to flash controller / PHY subsystems, we enable technology that allows Microchip’s products to interface to the outside world.
As a member of the Mixed-Signal Development Group, you will be working closely with architects, other digital design engineers, verification engineers, firmware engineers, and other team members. You will be engaged in the RTL design and verification of DDR or flash controller/PHY subsystem blocks.
Responsibilities

• Work closely with verification team and communicate regularly on the design and verification issues, audit and optimize the verification plan, debug design and simulation issues.
• Work closely with backend team on STA timing closure, help analyze timing critical paths and resolve STA timing issues.
• Work closely with Product Engineering team on characterization planning and execution as well as DFT related tasks through test plans, test configuration, and debug support.
• Design RTL using Verilog/SystemVerilog, integrate new IP blocks, and add glue logic for clock/reset, JTAG and DFT sub circuitry. Run clock domain crossing (CDC) checks, lint check and power simulation.
• Will be involved in the full ASIC design cycle, from design, verification, backend, to chip bringup and debugging.
• Write C code for DDR/Flash PHY drivers, run simulation to verify firmware, debug firmware and help bringup silicon in the lab. Support device firmware team by delivering DDR/Flash drivers.
• Write design, verification and test specifications and reports.

Requirements/Qualifications

• Experience in debugging using precision lab instruments (oscilloscope, logic analyzer, etc.)
• Work experience: 5 years of ASIC development experience
• Quick learner, proactive and able to resolve hard problem independently with some guidance from supervisor
• Experience or Knowledge in C/C++ programming, automation and scripting with languages such as Python/Perl/TCL/Shell
• Excellent analytical and debugging skills
• Working knowledge of DDR and Flash Controller/PHY/memory considered an asset
• Strong communication skills and ability to work as a team
• BS/MS/PhD in Electrical/Electronic Engineering, Computer Science, or Computer Engineering
• Experience in RTL design and verification, in Verilog, SystemVerilog or VHDL

Travel Time
0% - 25%