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Principal Engineer - Design

Company

Microchip Technology Inc.

Address Burnaby, British Columbia, Canada
Employment type FULL_TIME
Salary
Category Appliances, Electrical, and Electronics Manufacturing,Semiconductor Manufacturing
Expires 2023-07-31
Posted at 11 months ago
Job Description
Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc.
People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.
Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.
Visit our careers page to see what exciting opportunities and company perks await!

Microchip is currently looking for a Principal Engineer to join our Communications Business Unit located in Burnaby, Saskatoon or Toronto, Canada.
Microchip’s Communications Business Unit (CBU) is a premier supplier for 100Gbps+ Optical Networking & Connectivity Solutions for Telecom & Hyperscale Data Center Networks. Our devices enable high-bandwidth, cloud-based applications such as streaming services, social media platforms and video conferencing.
The CBU Product Development team is engaged through the full device R&D cycle from concept, design and implementation stages. Once a prototype is available, we support embedded software development and system validation lab testing through to mass-market production release. We are an experienced chip team working with the latest semiconductor development tools and methodologies in advanced process technologies to develop state-of-the-art network devices.
As a Principal Engineer in the CBU Product Development team you will be responsible for design and implementation of digital integrated circuits at the block level or top level of a device. You will collaborate with chip architects, subsystem leads and verification team members to deliver complex designs in a friendly and professional environment.
The role of the Principal Engineer includes but are not limited to the following:
  • Design digital circuits based on leading-edge industry standards and market requirements
  • Synthesize designs into logic gates taking advantage of industry-leading tools and flows
  • Develop or enhance areas of technical expertise to contribute to the wider team beyond individual deliverables or responsibilities
  • Support of products from Specification through to Production in collaboration with Engineers in Physical Design, Validation, Applications, Software/Firmware, Product Marketing and Production Engineering
  • Integrate digital and analog circuits with Design-for-Test (DFT) techniques
  • Implement designs in System Verilog RTL code utilizing low-power design principles
  • Contribute to the microarchitecture of communication semiconductor devices in partnership with System Architects
  • Provide floor-planning guidance and support to physical design/layout teams
  • Opportunities to lead a small team or other technical leadership roles may be available for the right candidate.
  • Derive physical timing specifications and confirm through Static Timing Analysis (STA)
Requirements/Qualifications
  • Excellent verbal and written communication skills in English
  • Proven ability to thrive on, learn and adapt to new methodologies and technologies
  • Bachelor’s or Master’s Degree in Electrical Engineering or Computer Engineering
  • 10+ years related experience
  • Strong coding skills
  • Experience with Synopsys or Cadence tool flows for synthesis, verification or STA (an asset)
  • Excellent analytical and debugging skills and the ability to proactively solve issues
  • Experience with 65nm and smaller silicon process technologies (an asset)
  • Experience in designing, synthesizing or verifying Verilog or VHDL based designs for silicon, on FPGA or other platforms
  • Experience using one or more of System Verilog/Verilog/VHDL, Tcl/Perl/Python, C/C++, XML
  • Familiarity with communication protocols such as Ethernet, OTN and others (an asset)
Travel Time
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