Phy Validation Engineer Jobs

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The Role
The AMD NBIO team is on the lookout for a dynamic, upbeat PHY Validation Engineer to join our growing team. As a key contributor to the success of AMD’s IP, you will be part of a leading team to drive and improve AMD’s abilities to deliver the highest quality, industry leading technologies to market. The NBIO team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.The Person
Strong analytical/problem solving skills and pronounced attention to details.
Must have excellent written and verbal communication skills.
Must excel in a dynamic team working environment.
Leadership and mentoring skills a definite asset.
Must be a self-starter and be able to independently drive tasks to completion.
Key Responsibilities
As a PHY Validation Design Engineer, you will drive the validation plan, execution and debug of various SerDes related features for AMD’s existing and forthcoming SOC programs.
Responsibilities Include

• Debugging and isolating PHY related issues found during pre-silicon, bring-up, system validation, and production phases of the SOC programs.
• Engaging on pre-silicon ‘shift left’ activities with cross-functional teams including but not limited to Design Verification (DV), Diagnostics, FPGA-based Emulation and other software/hardware modeling frameworks to ensure readiness for first silicon arrival, enablement of IP functionality, and debug of critical features.
• Driving technical innovation to enhance AMD's capabilities in PHY validation, including tool and script development, technical and procedural methodology enhancement, and various internal and cross-functional technical initiatives.
• Defining, documenting, executing and reporting the overall PHY test plan and validation strategy for a set of AMD IP’s.
• Supporting issues on customer platforms as requested by customer support teams.
• Leading collaborative technical discussions to drive resolution of technical issues and roll out technical initiatives.
• Developing knowledge of system architecture/debug and other internal IP’s.

Skills And Experience Requirements

• Extensive knowledge of physical and protocol levels of common high-speed interfaces an asset.
• Extensive experience with common lab equipment, including protocol/logic analyzers, oscilloscopes, etc.
• Extensive experience with ASIC debug techniques and methodologies.
• Experience in high speed IO SERDES (PHY) design/verification/post-silicon validation.
• Extensive experience with board/platform-level debug, including clock/power delivery, sequencing, analysis, and optimization.
• Strong scripting skills in Python/Perl/Ruby is highly desirable.
• Experience in new products bring-up support from first-Silicon in the lab through initial production
• In-depth knowledge of PC architectures/PCIe protocol is an asset.

Academic Credentials

• Bachelor’s or master’s degree majoring in EE, CS or related field.

Location
Markham Canada
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.