070334-Associate Architect - Post-Silicon Validation Engineer
By Capgemini Engineering At British Columbia, Canada
Design and Develop testability requirements in close partnership with IP and design teams and influence implementation of test features.
Develop test requirements for ground-breaking IP, to minimize test overhead both in design and for production.
Knowledge of test cell integration and production test program release
Working with custom network processors, transceivers, mixed signal ICs, multi-die modules, bare die, and stacked die.
Craft test hardware, bring up test, and release test programs to production.
Develop custom test solutions spanning high power, large dies, and packages to cost-sensitive products.
Smts Silicon Design Engineer
By AMD At Markham, Ontario, Canada
10 + years of experience on Logic Design, Physical Design and Design Verification preferred
Strong experience with System Verilog, RTL, C/C++ and Scripting
Experience using industry standard tools and adoptability to utilize home grown tools
Prior experience with graphics design/pipelining is required
Strong analytical/problem solving skills and pronounced attention to details
Good communication and interpersonal skills
Pmts Silicon Design Engineer
By AMD At Ottawa, Ontario, Canada
Excellent communication, management, and presentation skills.
Working with customers to showcase IP solutions and understand next generation requirements
Knowledge sharing and other contributions to Platform & System Architecture
10+ years experience delivering IP, systems or services for the communications/networking market
Experience with networking test equipment
Adept at collaboration among top-thinkers and senior architects with strong interpersonal skills to work across teams in different geographies